Advances in Design Methods from Modeling Languages for Embedded Systems and SoC’s by Dominique Borrione

Author:Dominique Borrione
Language: eng
Format: epub
Publisher: Springer Netherlands, Dordrecht

4.5 Compiler

The compiler firstly converts the modified CDFG to a parse tree. Then it calculates the minimum size of the register file by using the templates. This size can be increased by the compiler if the register size does not suffice during code generation. Note that reduction is always possible by tightening area constraints.

During the traversal of the parse tree two lists for registers are updated to monitor status of the registers. The first list keeps track of busy registers. Abusy register means a register which is occupied at that time. The second list keeps track of the operand which makes the register busy. The compiler generates the assembly code for each node in the parse tree if its siblings have already been processed. Therefore the output of each sibling is searched in the second list so as to see whether it appears. If it is the case, then the related MOV instruction in the template is skipped and the busy flag in the first list is set. Otherwise, an empty register is searched in the first list so as to replace the related dummy register with the empty register. Then the status of the selected register is changed from empty to busy and the second list is updated with the output of the sibling. As soon as the related code is generated, the status of the registers using the outputs of the siblings are reset to free. There exists no case where all registers are busy because the size of register file is calculated prior to compilation.

After the assembly code is generated, then machine code is generated by using the instruction machine code explained in Section 4.

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